Mitsubishi FX Programmable Logic Controllers (eBook)

Cover 1
Contents 8
Preface 16
Acknowledgements 18
Resources 20
Glossary 22
1. Introduction to PLCs 24
Basic PLC units 24
Comparison of PLC and RELAYsystems 25
PLC sof t war e 25
Gx-Developer software 26
Hardware configuration 26
Base unit,extension units and extension blocks 27
PLC voltage supplies 27
Smaller FX2NPLCs 27
Larger FX2NPLCs 29
5 V DC supply 29
Special unit power supply requirements 29
Part number 30
Serial number 30
PLC inputs 31
AC i nputs 31
PLC outputs 32
Source - sink inputs 33
The source/sink - S/S connection 34
Source inputs - blockdiagram 34
Sink inputs - block diagram 35
Proximity sensors 35
S/S terminal configurations 36
PLC ladder diagramsymbols 36
PLC address ranges 38
Basic operation of a PLC system 38
Block diagram - basic operation of a PLC system 39
Principle of operation 40
2. Gx-Developer – startup procedure 41
Opening a newproject 42
Display settings - Zoom 42
Ladder diagramnumbers 45
Project data list 45
3. Producing a ladder diagram 47
PLC program - FLASH1 47
Entering a ladder diagram 48
Conversion to an instruction program 50
Saving the project 51
Program error check 51
Instruction programming 52
Program search 54
4. Modifications to an existing project 63
Copying a project 63
Modification of the ladder diagramFLASH2 65
Modification details 65
Deleting 73
5. Serial transfer of programs 78
Downloading a project to a PLC unit 78
Executing the project 79
Reducing the number of steps transferred to the PLC 80
Communication setup 81
System image 82
Change of communications port 83
Verification 85
Uploading a project from a PLC 86
6. Monitoring 89
Ladder diagram monitoring 89
Entry data monitoring 90
Combined ladder and entry data monitoring 93
7. Basic PLC programs 94
Traffic light controller - TRAF1 94
Furnace temperature controller - FURN1 97
Interlock circuit - INTLK1 101
Latch relays 103
Counters 104
Online programming 107
Batch counter BATCH1 109
Assignment - BATCH2 110
Master control - MC1 110
8. PLC sequence controller 114
Sequence function chart - SFC 115
Ladder diagram - PNEU1 116
Simulation - PNEU1 120
Pneumatic panel operation 121
Forced input/output 124
Assignment - PNEU2 127
9. Free line drawing 128
Inserting an output in parallel with an existing output 131
Delete free line drawing 132
10. Safety 134
Emergency stop requirements 134
Safety relay specification 135
Emergency stop circuit - PNEU1 136
Safety relay - fault conditions 137
Systemstart-up check 138
11. Documentation 139
Comments 140
Statements 146
Display of comments and statements 147
Comment display - 15/16 character format 148
Comment display - 32 character format 151
Notes 153
Segment/note - block edit 155
Ladder diagram search using statements 156
Change of colour display 157
Display of comments, statements and notes 158
Printouts 160
Multiple printing 164
Saving comments in the PLC 169
12. Entry ladder monitoring 174
Ladder diagram - PNEU1 175
Principle of operation - entry ladder monitoring 176
Deleting the entry ladder monitor diagram 179
13. Converting a MEDOC project to Gx-Developer 180
Importing a MEDOC file into Gx-Developer 180
14. Change of PLC type 185
15. Diagnostic fault finding 188
CPU errors 188
Battery error 189
Program errors 189
Help display program errors 191
Program error check 192
16. Special M coils 194
Device batch monitoring 194
Option setup 196
Monitoring the Xinputs 197
17. Set–reset programming 198
PNEU 4 198
Sequence of operation automatic cycle 199
Sequence function chart PNEU4 199
Ladder diagram PNEU4 200
Principle of operation 200
Simulation and monitoring procedure 201
Monitoring PNEU4 202
18. Trace 203
Principle of operation 203
Ladder diagram PNEU4 204
Trace setup procedure 205
Trace data 205
Trace conditions 206
Transfer Trace data to PLC 208
Saving theTrace setup data 208
Reading the Trace setup data from file 209
Start Trace operation 210
Start trigger X0 212
Obtaining theTrace waveforms 213
Trace results 213
Measuring the time delay T0 216
Calculation of elapsed time 217
19. Data registers 218
Number representation - binary/decimal 218
Converting a binary number to its decimal equivalent 219
Binary numbers and binary coded decimal 220
Advanced programming instructions 221
20. Introduction to programs using data registers 223
Binary counter - COUNT3 223
BCD counter - COUNT4 225
Multiplication program - MATHS1 228
RPM counter - REV1 229
Timing control of a bakery mixer - MIXER1 233
21. Ladder logic tester 237
Introduction 237
Program execution 237
Input simulation 239
Device memory monitor 240
Timing charts 245
Producing the timing chart waveforms 247
Resetting the timing chart display 248
Saving the setup details 248
I/O system settings 248
Procedure - I/O system setting 249
Entering the Conditions and Input No.settings 251
Executing the I/O system 255
Resetting a data register using the I/O system 257
LLT2 modification 261
Simulating PNEU1using ladder logic tester 263
PNEU1 procedure using ladder logic tester 264
Monitoring procedure 265
22. Bi-directional counters 267
Ladder diagram – COUNT5 267
Special memory coils M8200–M8234 268
Principle of operation – COUNT5 268
Operating procedure 268
Monitoring – COUNT5 269
23. High-speed counters 270
Introduction 270
Types of high-speed counters 270
FX range of high-speed counters 272
High-speed counter inputs 273
Up/down counting 274
Selecting the high-speed counter 274
Maximum total counting frequency 275
High-speed counter - HSC1 276
Decade divider - HSC2 277
Motor controller - HSC3 280
A/B phase counter - HSC4 283
24. Floating point numbers 288
Floating point number range 288
Number representation 288
Floating point instructions 288
Storing floating point numbers - FLT1 289
Monitor - ladder diagram FLT1 290
Device batch monitoring 290
Floating point format 291
Obtaining the floating point value 292
Device batch monitoring - floating point numbers 293
Area of a circle - FLT2 293
Ladder diagram - FLT2 294
Principle of operation - FLT2 295
Monitored results - FLT2 296
Floating point - ladder logic tester 296
25. Master control – nesting 298
Nesting level 298
Ladder diagram MC2 299
Principle of operation 300
26. Shift registers 302
Shift register applications 302
Basic shift register operation 302
Ladder diagram - SHIFT1 303
Principle of operation - SHIFT1 303
Operating procedure 304
Monitoring - SHIFT1 304
27. Rotary indexing table 305
Index table system - plan view 305
System requirements 306
Shift register layout 307
Ladder diagram - ROTARY1 308
Principle of operation - ROTARY1 310
Monitoring procedures 312
Instruction scan and execution 314
28. Index registers V and Z 316
Index register instructions 316
Stock control application INDEX1 317
System block diagram 317
Warehouse - look-up table 317
Ladder diagram - INDEX1 318
Principle of operation 318
Monitoring - INDEX1 319
29. Recipe application – BREW1 321
System diagram 322
Sequence of operation 322
Recipe look-up tables 322
Entering values into a look-up table (DWR) 323
Downloading the recipe look-up table 326
Selecting the device memory range 326
Monitoring the recipe look-up table values 328
Ladder diagram - BREW1 328
Principle of operation - BREW1 329
Monitoring - BREW1 330
Test results 332
Excel spreadsheet - recipe1 332
30. Sub-routines 333
Sub-routine program flow 334
Principle of operation 334
Temperature conversion - SUB1 335
Ladder diagram - SUB1 335
Labels 336
Principle of operation - SUB1 336
The sub-routine instructions 336
Monitoring - SUB1 336
31. Interrupts 338
Interrupt application 338
Interrupt project - INT1 339
Sequence of operation - automatic cycle 339
Waveforms 340
Ladder diagram - INT1 341
Principle of operation - INT1 342
Interrupt service routine 345
Monitoring - INT1 345
32. Step counter programming 347
Ladder diagram - STEP_CNTR1 348
Principle of operation - STEP_CNTR1 349
Simulation and monitoring procedure 352
Entry data monitoring - STEP_CNTR1 353
Pneumatic panel operation 354
33. Automatic queuing system 355
System hardware 355
FIFO memory stack 356
Software diagram 356
Ladder diagram - QUEUE1 357
Principle of operation - QUEUE1 359
Testing - QUEUE1 365
Monitoring - QUEUE1 366
Analysis of results 366
34. Analogue to digital conversion FX2N-4AD 367
Introduction 367
FX2N-4AD buffer memory addresses and assignments 367
Voltage and current conversion 368
Resolution - maximum input voltage 369
Resolution - maximum input current 370
Relationship between Vin and digital output 371
ADC equations 372
Resolution - independent of input voltage 373
Highest possible resolution 374
Example - voltage conversion 375
Example - current conversion 376
Count averaging 377
Positioning the analogue unit 378
ADC wiring diagram 378
Hexadecimal numbering system for special units 379
Channel initialisation 379
TO and FROM instructions 380
ADC errors - BFM 29 382
Buffer memory - EEPROM 383
Software programming of offset and gain 383
Detecting an open circuit 384
Voltage/current specification 384
Ladder diagram - ADC1 385
Principle of operation - ADC1 387
Practical - analogue to digital conversion 389
ADC results 390
Monitoring using buffer memory batch 390
Test results 391
35. Digital to analogue conversion FX2N-4DA 393
Introduction 393
Voltage resolution 393
FX2N-4DA buffer memory addresses and assignments 394
Error codes - BFM 29 395
Hardware diagram 396
DAC special unit no.1 396
Output mode select 397
Ladder diagram - DAC1 397
Principle of operation - DAC 398
Practical - digital to analogue conversion 400
Assignments 401
Index 410