Area Array Interconnection Handbook -

Area Array Interconnection Handbook

Buch | Hardcover
1192 Seiten
2001
Kluwer Academic Publishers (Verlag)
978-0-7923-7919-5 (ISBN)
85,55 inkl. MwSt
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This handbook provides a treatment of area-array interconnections for chips and micro-electronic packages in terms of optimizing densification, functionality and reliability. It compares alternative and competing technologies, defining cost versus benefit tradeoffs and strategies.
This handbook provides a comprehensive treatment of area-array interconnections for both chips and microelectronic packages in terms of optimizing densification, functionality and reliability. It provides comparisons with alternative and competing technologies, clearly defining cost versus benefit tradeoffs and strategies. Process details are defined in the order of their typical manufacturing sequence, indicating tooling requirements and potential yield detractors. In addition, the handbook has individual chapters devoted to supporting disciplines that play a key role in satisfying the requirements of microelectronic package applications: efficient thermal-dissipation techniques, metallurgical and mechanical characteristics of interconnections and electrical design strategies. Area-array technology at both die and chip carrier levels offers the best opportunity of satisfying the demanding performance requirements that users at all levels of the product spectrum have come to expect.
This handbook fully describes the "how and why" of the inherent elements of area-array technology that give rise to enhanced electrical and thermal dissipation capabilities, and densification to accommodate demanding design requirements, while at the same time accommodating size and cost reductions to enhance comfort and portability.

1. History of Flip Chip and Area Array Technology. Part I: Area Array Die and Interconnection Technology. 2. Wafer Bumping. 3. Wafer-Level Test. 4. Known Good Die (KGD) 5. Wafer Finishing - Dicing, Picking, Shipping. 6. Ceramic Chip Carriers. 7. Laminate/HDI Carriers. 8. Flip-Chip Die Attach Technology. 9. Soldier Bump Flip-Chip Replacement Technology on Ceramic Carriers. 10. Manufacturing Considerations and Tools for Flip Chip Assembly. 11. Test and Burn-In Sockets. 12. Underfill: The Enabling Technology for Flip-Chip Packing. 13. Reliability of Die-Level Interconnections 14. Ceramic and Plastic Pin Grid Array Technology. 15. Plastic Ball Grid Arrays (PBGA) 16. Tape Ball Grid Array. 17. Ceramic Ball and Column Grid Arrays. 18. Chip Scale Package Technology. 19. Assembly of Area Array Components. 20. Area Array Replacement Technology. 21. Product Connector Technology. 22. Board-Level Area Array Interconnect Reliability. 23. Chip Scale Package Assembly Reliability. 24. Area Array Design Principles. 25. Area Array Leverages: Why and How to Choose a Package. 26. Interconnections for High Frequency Applications. 27. Thermal Performance. 28. Metallurgical Factors. References.

Erscheint lt. Verlag 31.10.2001
Zusatzinfo 481 black & white illustrations
Sprache englisch
Gewicht 1846 g
Einbandart gebunden
Themenwelt Technik Elektrotechnik / Energietechnik
ISBN-10 0-7923-7919-5 / 0792379195
ISBN-13 978-0-7923-7919-5 / 9780792379195
Zustand Neuware
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