Facing the Multicore-Challenge
Springer Berlin (Verlag)
978-3-642-16232-9 (ISBN)
The proceedings at hand are the outcome of the conference for young sci- tists titled Facing the Multicore-Challenge held at the Heidelberger Akademie der Wissenschaften, March 17 19, 2010. The conference focused on topics - lated to the impact of multicore and coprocessor technologies in science and for large-scale applications in an interdisciplinary environment. The conference was funded by the Heidelberger Akademie der Wissenschaften and placed emphasis on the support and advancement of young scientists. The aim of the conference was to bring together leading experts as well as motivated young researchers in order to discuss, recent developments, the present status of the ?eld, and its future prospects the exchange of ideas, in a pleasant atmosphere that stimulates. It was the designated goal to address current issues including mathematical modeling, design of parallel algorithms, aspects of microprocessor architecture, parallel programming languages, c- pilers, hardware-aware computing, heterogeneous platforms, emerging archit- tures, tools, performance tuning, and requirements for large-scale applications. Thisbroadrangeofissuesisre?ectedbythepresentconferenceproceedings.The results of the presented research papers clearly show the potential of emerging technologiesintheareaofmulticoreandmanycoreprocessorsthatarepavingthe way towards personal supercomputing. However, many issues related to parallel programmingenvironments, developmentof portable and future-proof concepts, and the design of scalable and manycore-ready algorithms still need to be - dressed in future research. Some of these points are the subject of the presented papers.
Invited Talks.- Analyzing Massive Social Networks Using Multicore and Multithreaded Architectures.- MareIncognito: A Perspective towards Exascale.- The Natural Parallelism.- Computer Architecture and Parallel Programming.- RapidMind: Portability across Architectures and Its Limitations.- A Majority-Based Control Scheme for Way-Adaptable Caches.- Improved Scalability by Using Hardware-Aware Thread Affinities.- Thread Creation for Self-aware Parallel Systems.- Applications on Multicore.- G-Means Improved for Cell BE Environment.- Parallel 3D Multigrid Methods on the STI Cell BE Architecture.- Applying Classic Feedback Control for Enhancing the Fault-Tolerance of Parallel Pipeline Workflows on Multi-core Systems.- Lattice-Boltzmann Simulation of the Shallow-Water Equations with Fluid-Structure Interaction on Multi- and Manycore Processors.- FPGA vs. Multi-core CPUs vs. GPUs: Hands-On Experience with a Sorting Application.- GPGPU Computing.- Considering GPGPU for HPC Centers: Is it Worth the Effort?.- Real-Time Image Segmentation on a GPU.- Parallel Volume Rendering Implementation on Graphics Cards Using CUDA.
Erscheint lt. Verlag | 6.10.2010 |
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Reihe/Serie | Lecture Notes in Computer Science | Theoretical Computer Science and General Issues |
Zusatzinfo | X, 156 p. 60 illus. |
Verlagsort | Berlin |
Sprache | englisch |
Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
Mathematik / Informatik ► Mathematik ► Analysis | |
Mathematik / Informatik ► Mathematik ► Wahrscheinlichkeit / Kombinatorik | |
Schlagworte | Algorithm analysis and problem complexity • algorithms • cell BE • Complexity • Computational Science • cuda • Design • Development • dispersion simulation • Embedded Systems • fault tolerance • Feedback Control • Fluid-Structure Interaction • FPGA • Gauß-Seidel smoother • GPGPU • GPU • grid computing • High Performance Computing • IBM cell SDK • Lattice-Boltzmann methods • multi-core • Multigrid • Multithreading • Natur • Numerical Algorithms • OpenMP • Optimization • Parallel Algorithms • Parallel Architectures • Parallel Computing • Parallel Programming • parallel sort • Performance Analysis • performance tuning • pipeline scheduling • programming • queuing theory • ray casting • Scheduling • Science • Scientific Computing • shallow water equations • Simulation • Software • sorting • stencil kernel • Technologie • VHDL • volume rendering |
ISBN-10 | 3-642-16232-0 / 3642162320 |
ISBN-13 | 978-3-642-16232-9 / 9783642162329 |
Zustand | Neuware |
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