Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation
20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers
Seiten
2011
|
2011
Springer Berlin (Verlag)
978-3-642-17751-4 (ISBN)
Springer Berlin (Verlag)
978-3-642-17751-4 (ISBN)
This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010.The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.
Erscheint lt. Verlag | 4.2.2011 |
---|---|
Reihe/Serie | Lecture Notes in Computer Science | Theoretical Computer Science and General Issues |
Zusatzinfo | XII, 260 p. 130 illus., 53 illus. in color. |
Verlagsort | Berlin |
Sprache | englisch |
Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
Schlagworte | Algorithm analysis and problem complexity • Integrated Circuits • low power architectures • low power circuits • manufacturability • performance evalutation • power consumption • side-channel attacks • Simulation • Systems Design • systems modelling • timing analysis |
ISBN-10 | 3-642-17751-4 / 3642177514 |
ISBN-13 | 978-3-642-17751-4 / 9783642177514 |
Zustand | Neuware |
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