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Low Power Interconnect Design

Sandeep Saini (Autor)

Buch | Hardcover

152 Seiten

2015 | 2012
Springer-Verlag New York Inc.
9781461413226 (ISBN)

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This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

Part I Basics of Interconnect Design.- Introduction to Interconnects.- CMOS Buffer.- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design.- Buffer Insertion as a Solution to Interconnect Issues.- Schmidt Trigger Approach.- Part III Bus Coding Techniques for Low Power Interconnect Design.- Bus Coding Techniques.

Zusatzinfo	12 Illustrations, color; 99 Illustrations, black and white; XVII, 152 p. 111 illus., 12 illus. in color.
Verlagsort	New York, NY
Sprache	englisch
Maße	155 x 235 mm
Themenwelt	Mathematik / Informatik ► Informatik ► Theorie / Studium
Themenwelt	Technik ► Elektrotechnik / Energietechnik
Schlagworte	Embedded Systems • Integrated Circuit Design • Interconnect Buffer Insertion • Network on Chip • On-Chip Interconnect • Schmitt Trigger
ISBN-13	9781461413226 / 9781461413226
Zustand	Neuware