Multiple Constant Multiplication Optimizations for Field Programmable Gate Arrays
Seiten
2016
|
1st ed. 2016
Springer Fachmedien Wiesbaden GmbH (Verlag)
978-3-658-13322-1 (ISBN)
Springer Fachmedien Wiesbaden GmbH (Verlag)
978-3-658-13322-1 (ISBN)
This work covers field programmable gate array
(FPGA)-specific optimizations of circuits computing the multiplication of a
variable by several constants, commonly denoted as multiple constant
multiplication (MCM). These optimizations focus on low resource usage but high
performance. They comprise the use of fast carry-chains in adder-based constant
multiplications including ternary (3-input) adders as well as the integration
of look-up table-based constant multipliers and embedded multipliers to get the
optimal mapping to modern FPGAs. The proposed methods can be used for the
efficient implementation of digital filters, discrete transforms and many other
circuits in the domain of digital signal processing, communication and image
processing.
(FPGA)-specific optimizations of circuits computing the multiplication of a
variable by several constants, commonly denoted as multiple constant
multiplication (MCM). These optimizations focus on low resource usage but high
performance. They comprise the use of fast carry-chains in adder-based constant
multiplications including ternary (3-input) adders as well as the integration
of look-up table-based constant multipliers and embedded multipliers to get the
optimal mapping to modern FPGAs. The proposed methods can be used for the
efficient implementation of digital filters, discrete transforms and many other
circuits in the domain of digital signal processing, communication and image
processing.
Martin Kumm is working as a postdoctoral researcher at the University of Kassel. His current research interests are digital arithmetic, digital signal processing and discrete optimization, all in the context of field programmable gate arrays.
Heuristic and ILP-Based Optimal Solutions for the Pipelined Multiple Constant Multiplication Problem.- Methods to Integrate Embedded Multipliers, LUT-Based Constant Multipliers and Ternary (3-Input) Adders.- An Optimized Multiple Constant Multiplication Architecture Using Floating Point Arithmetic.
Erscheinungsdatum | 08.10.2016 |
---|---|
Zusatzinfo | XXXIII, 206 p. 47 illus. |
Verlagsort | Wiesbaden |
Sprache | englisch |
Maße | 148 x 210 mm |
Themenwelt | Informatik ► Weitere Themen ► Hardware |
Mathematik / Informatik ► Mathematik ► Angewandte Mathematik | |
Technik ► Elektrotechnik / Energietechnik | |
Schlagworte | Appl.Mathematics/Computational Methods of Engineer • Computer Hardware • Digital Arithmetic • Digital filter • Discrete Optimization • Electrical Engineering • Engineering • Hybrid Adder Graphs Containing Embedded Multiplier • Hybrid Adder Graphs Containing Embedded Multipliers • The Pipelined Multiple Constant Multiplication Pro • The Pipelined Multiple Constant Multiplication Problem |
ISBN-10 | 3-658-13322-8 / 3658133228 |
ISBN-13 | 978-3-658-13322-1 / 9783658133221 |
Zustand | Neuware |
Haben Sie eine Frage zum Produkt? |
Mehr entdecken
aus dem Bereich
aus dem Bereich
ein Streifzug durch das Innenleben eines Computers
Buch | Softcover (2023)
Springer (Verlag)
24,99 €