Machine Learning Support for Fault Diagnosis of System-on-Chip
Springer International Publishing (Verlag)
978-3-031-19641-6 (ISBN)
This book provides a state-of-the-art guide to Machine Learning (ML)-based techniques that have been shown to be highly efficient for diagnosis of failures in electronic circuits and systems. The methods discussed can be used for volume diagnosis after manufacturing or for diagnosis of customer returns. Readers will be enabled to deal with huge amount of insightful test data that cannot be exploited otherwise in an efficient, timely manner. After some background on fault diagnosis and machine learning, the authors explain and apply optimized techniques from the ML domain to solve the fault diagnosis problem in the realm of electronic system design and manufacturing. These techniques can be used for failure isolation in logic or analog circuits, board-level fault diagnosis, or even wafer-level failure cluster identification. Evaluation metrics as well as industrial case studies are used to emphasize the usefulness and benefits of using ML-based diagnosis techniques.
Patrick GIRARD received a M.Sc. degree in Electrical Engineering and a Ph.D. degree in Microelectronics from the University of Montpellier, France, in 1988 and 1992 respectively. He also received the "Habilitation à Diriger des Recherches" degree from the University of Montpellier, France, in 2003. He is currently Research Director at CNRS (French National Center for Scientific Research) and works in the Microelectronics Department of the Laboratory of Informatics, Robotics and Microelectronics of Montpellier (LIRMM) - France.
Patrick Girard is Coordinator of the International Research Project « INSIMIA » (French-Italian Research Program on the Integrity of Integrated Systems in the Era of Artificial Intelligence) created in 2021 by the CNRS and the University of Montpellier, France, with the Politecnico di Torino, Italy. Since 2006, he is deputy director of the French scientific network dedicated to research in the fields of System-on-Chip, Embedded Systems and Connected Objects (SOC2), a network composed of 1400 researchers. From 2010 to 2014, he was Director of the Microelectronics Department at LIRMM, at that time composed of about 100 people. His research interests include all aspects of digital and memory circuit test and reliability, with emphasis on critical constraints such as timing and power. Robust design of neuromorphic circuits, test of approximate circuits, as well as machine learning for fault diagnosis are also part of his new research activities.Patrick Girard is Technical Activities Chair of the Test Technology Technical Council (TTTC) of the IEEE Computer Society. From 2006 to 2010, he was Vice-Chair of the European TTTC (ETTTC) of the IEEE Computer Society. He has served on numerous conference committees including ACM/IEEE Design Automation Conference (DAC), ACM/IEEE Design Automation and Test in Europe (DATE), IEEE International Test Conference (ITC), IEEE VLSI Test Symposium (VTS), IEEE European Test Symposium (ETS), IEEE Asian Test Symposium (ATS), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), and IEEE International NEWCAS Conference.Patrick Girard was the founder and Editor-in-Chief of the ASP Journal of Low Power Electronics (JOLPE). He is an Associate Editor of the IEEE Transactions on Emerging Topics in Computing, the IEEE Transactions on Circuits and Systems I: Regular Papers, the IEEE Transactions on Circuits and Systems II: Express Briefs, and the Journal of Electronic Testing (JETTA - Springer). He was formerly an Associate Editor of the IEEE Transactions on VLSI Systems, IEEE Transactions on Computers, and IEEE Transactions on Computer-Aided Design of Circuits and Systems.
Patrick Girard has been involved in several (34) European research projects (ESPRIT III ATSEC, EUREKA MEDEA, MEDEA+ ASSOCIATE, IST MARLOW, MEDEA+ NanoTEST, CATRENE TOETS, ENIAC ELESIS, CATRENE MASTER_3D, PENTA HADES), national research projects (ANR, FUI), and industrial research projects with major companies like Infineon Technologies, Intel, Atmel, ST-Ericsson, STMicroelectronics, etc.
Patrick Girard has supervised 44 PhD dissertations, and has published 12 books or book chapters, 90 journal papers, and more than 250 conference and symposium papers. He is co-author of 5 patents. He is a Fellow of the IEEE and a Golden Core Member of the IEEE Computer Society.
Shawn Blanton is Joseph F. and Nancy Keithley Professor of Electrical and Computer Engineering at Carnegie Mellon University. In 1995 he received his Ph.D. in Electrical Engineering and Computer Science from the University of Michigan, Ann Arbor. His personal research interests include various aspects of integrated system testing and diagnosis, and the development of design methodologies
Introduction.- Prerequisites on Fault Diagnosis.- Conventional Methods for Fault Diagnosis.- Machine Learning and Its Applications in Test.- Machine Learning Support for Logic Diagnosis.- Machine Learning Support for Cell-Aware Diagnosis.- Machine Learning Support for Volume Diagnosis.- Machine Learning Support for Diagnosis of Analog Circuits.- Machine Learning Support for Board-level Functional Fault Diagnosis.- Machine Learning Support for Wafer-level Failure Cluster Identification.- Conclusion.
| Erscheinungsdatum | 16.03.2024 |
|---|---|
| Zusatzinfo | XI, 316 p. 165 illus. |
| Verlagsort | Cham |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Intelligent VLSI Test Engineering • Intelligent Yield Optimization • Machine Learning in Design and Test • Smart Analytics for semiconductor design and test • VLSI Design for Machine Learning |
| ISBN-10 | 3-031-19641-4 / 3031196414 |
| ISBN-13 | 978-3-031-19641-6 / 9783031196416 |
| Zustand | Neuware |
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