Transistor Level Modeling for Analog/RF IC Design (eBook)

The editors and authors present a wealth of knowledge regarding the most relevant aspects in the field of MOS transistor modeling.

The variety of subjects and the high quality of content of this volume make it a reference document for researchers and users of MOSFET devices and models. The book can be recommended to everyone who is involved in compact model developments, numerical TCAD modeling, parameter extraction, space-level simulation or model standardization. The book will appeal equally to PhD students who want to understand the ins and outs of MOSFETs as well as to modeling designers working in the analog and high-frequency areas.

Dr. Grabinski, Dr. Nauwelaers and Dr. Scheurs organized the MOS-Modeling workshop at the European Solid-State Devices Conference (ESSDERC) in 2004, and due to popular request will do again at ESSDERC 2005 in Grenoble. Dr. Grabinski is in industry, at Freescale Semiconductor, while Dr. Nauwelaers and Dr. Schreurs are in academia.

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Among many great inventions made in the 20th century, electronic circuits, which later evolved into integrated circuits, are probably the biggest, when considering their contribution to human society. Entering the 21st century, the importance of integrated circuits has increased even more. In fact, without the help of integrated circuits, recent high-technology society with the internet, cellular phone, car navigation, digital camera, and robot would never have been realized. Nowadays, integrated circuits are indispensable for almost every activity of our society. One of the critical issues for the fabrication of integrated circuits has been the precise design of the high-speed or high-frequency operation of circuits with huge number of components. It is quite natural to predict the circuit operation by computer calculation, and there have been three waves for this, at 15-year intervals. The ?rst wave came at the beginning of the 1970s when LSIs (Large Scale Integrated circuits) with more than 1000 components had just been int- duced into the market. A mainframe computer was used for the simulation, and each semiconductor company used its own proprietary simulators and device models. However, the capability of the computer and accuracy of the model were far from satisfactory, and there are many cases of the necessity of circuit re-design after evaluation of the ?rst chip. The second wave hit us in the middle of 1980s, when the EWS (Engine- ing Work Station) was introduced for use by designers.