Design Methodologies for Secure Embedded Systems (eBook)

Preface 6
Table of Contents 11
Towards Co-design of HW/SW/Analog Systems 12
Introduction 12
Related Work 14
Kahn Process Networks, Timed Data Flow, and TLM 15
Executable Specification 17
Combination of KPN and TDF 17
Modeling and Simulation of KPN and TDF with SystemC 18
Architecture Exploration 21
Architecture Mapping to Analog and HW/SW Processors 22
Estimation of Quantitative Properties by System Simulation 26
Coupling of TDF and TLM Models of Computation 27
Example 30
Conclusion 33
References 34
A Flexible Hierarchical Approach for Controlling the System-Level Design Complexity of Embedded Systems 36
Introduction 36
Related Work 38
Computational Model 39
Hierarchical Specification Method 40
Dynamic System Behavior 42
Task Behavior 44
Generating Current Model Views 46
Results 48
Conclusion 52
References 52
Side-Channel Analysis – Mathematics Has Met Engineering 54
Introduction 54
My Personal Relation to Side-Channel Analysis 55
Timing Attack from CARDIS 1998 56
The Original Attack DKL+98 57
A Closer Look on Montgomery's Multiplication Algorithm 59
The Optimised CARDIS Timing Attack 60
Stochastic Properties of Montgomery's Multiplication Algorithm: Further Consequences 64
A New Method in Power Analysis 65
The Stochastic Approach 66
The Stochastic Approach Supports Design 70
Conclusion 71
References 71
Survey of Methods to Improve Side-Channel Resistance on Partial Reconfigurable Platforms 74
Introduction 74
Reconfigurable Hardware 75
FPGA Platform Technology 75
Terminology 77
GeneralWorkflow for Partial Reconfiguration 79
Workflow for PR in Xilinx FPGAs 81
Side-Channel Attacks 82
Countermeasures against Power Attacks 85
Masking 85
Hiding 86
Reconfigurable Technology-Based Countermeasure 88
Mutating the Data Path 89
Summary and Conclusion 93
References 93
Multicast Rekeying: Performance Evaluation 96
Introduction 96
Rekeying Benchmark Design Concept 97
Benchmark Abstraction Model 98
Benchmark Data Flow 99
Rekeying Benchmark as a Simulation Environment 100
Cost Metrics and Group Parameters 100
Evaluation Criteria and Simulation Modes 101
Rekeying Benchmark Design 102
Request Generator 103
Algorithm Manager 107
Performance Evaluator 110
Case Study 112
Conclusion 114
References 114
Robustness Analysis of Watermark Verification Techniques for FPGA Netlist Cores 116
Introduction 116
Related Work 118
Theoretical Watermark Model for Robustness Analysis against Attacks 119
Definitions 122
Threat Model 124
Watermark Verification Strategies for Embedded FPGAs 126
Watermark Verification Using the FPGA Bitfile 127
Lookup Table Content Extraction 127
Watermarks in Functional LUTs for Netlist Cores 128
PowerWatermarking 131
Conclusions 136
References 136
Efficient and Flexible Co-processor for Server-Based Public Key Cryptography Applications 139
Introduction 139
Related Work 140
Cryptographic Aspects 141
Abstractions Levels for Public Key Cryptography 142
Parallelization in Public Key Cryptography 143
Co-processor Architecture 146
Design Consideration 146
Resulting Architecture 148
Prototype Implementation 150
Supported Functionality 150
Implementation Overview 151
Modular Multiplication 152
Results 153
Conclusion 157
References 157
Cellular-Array Implementations of Bio-inspired Self-healing Systems: State of the Art and Future Perspectives 160
Introduction 160
Classification of Bio-inspired and Self-healing Systems 161
Analogies between Biology and Hardware Systems 162
Error Detection and Correction 162
Architectures for Redundant, Cellular Arrays 164
MUXTREE Architecture 164
Architecture due to Szasz et al. 167
Architecture due to Lala et al. 167
Architecture due to Greensted et al. 168
Cell Design 169
Embryonic Cell Design 169
Implementation of Functionality 170
Cell Configuration 171
Technological Requirements for Self-healing Structures 172
Design Methodologies for Cellular Arrays 173
Measuring the Quality of Self-healing Cellular Arrays 173
Design and Programming Paradigms 174
Cell Granularity 175
Evaluation of the Analogy 175
Conclusion and Future Outlook 176
References 177
Combined Man-in-the-Loop and Software-in-the-Loop Simulation Electronic Stability Program for Trucks on the Daimler Driving Simulator 180
Introduction 180
ESP for Commercial Vehicles 184
System Description 184
System Development 186
Software-in-the-Loop Integration of ESP into Vehicle Models 188
Man-in-the-Loop Simulation: The Driving Simulator 190
Transfer of Vehicle Models to the Driving Simulator 190
ESP Investigations on the Driving Simulator 192
Results 193
Summary, Future Work 193
References 194
Secure Beamforming for Weather Hazard Warning Application in Car-to-X Communication 195
Introduction 195
Secure Beamforming Concept 199
Attacker Model 200
Antenna Model 200
Weather Hazard Warning Application 202
Information Distribution Requirements 202
Weather C2X Architecture 202
In-Vehicle Weather Detection 203
Event Notification Strategies 204
Involved Message Types 205
Data Aggregation and Fusion 205
Communication Scenarios 206
Simulation 207
Simulation Objectives 207
Secure Beamforming Design Methodology 208
Simulation Results 208
Beamforming Protocols for Wheather Hazard Warning 209
Summary and Conclusion 213
References 214
Author Index 215