Modern Circuit Placement (eBook)
XX, 324 Seiten
Springer US (Verlag)
978-0-387-68739-1 (ISBN)
This book covers advanced techniques in modern circuit placement. It details all of most recent placement techniques available in the field and analyzes the optimality of these techniques. Coverage includes all the academic placement tools that competed against one another on the same industrial benchmark circuits at the International Symposium on Physical Design (ISPD), these techniques are also extensively being used in industrial tools as well. The book provides significant amounts of analysis on each technique such as trade-offs between quality-of-results (QoR) and runtime.
Modern Circuit Placement: Best Practices and Results describes advanced techniques in VLSI circuit placement which is one of the most important steps of the VLSI physical design flow. Physical design addresses the back-end layout stage of the chip design process. As technology scales down, the significance of interconnect optimization becomes much more important and physical design, particularly the placement process, is essential to interconnect optimization.This book has four unique characteristics. First, it focuses on the most recent highly scalable placement techniques used for multi-million gate circuit designs, with consideration of many practical aspects of modern circuit placement, such as density and routability control, mixed-size placement support, and area I/O support. Second the book addresses dominant techniques being used in the field. This book includes all the academic placement tools that competed at the International Symposium on Physical Design (ISPD) placement contest in 2005 and 2006. Although these tools are developed by academia, many core techniques in these tools are being used extensively in industry and represent today's advanced placement techniques. Third, the book provides quantitative comparison among the various techniques on common benchmark circuits derived from real-life industrial designs. The book includes significant amounts of analysis on each technique, such as trade-offs between quality-of-results (QoR) and runtime. Finally, analysis of the optimality of the placement techniques is included. This is done by utilizing placement benchmarks with known optimal solutions, yet with characteristics similar to real industrial designs. Modern Circuit Placement: Best Practices and Results is a valuable tool and a must-read for graduate students, researchers and CAD tool developers in the VLSI physical synthesis and physical design fields.
Contents 7
Foreword 14
Preface 15
References 18
Part I Benchmarks 19
1 ISPD 2005/2006 Placement Benchmarks 20
1.1 Introduction 20
1.2 ISPD 2005 Placement Contest and Benchmark1 21
1.3 ISPD 2006 Placement Contest and Benchmark 24
1.4 ISPD Placement Contest Results 25
References 28
2 Locality and Utilization in Placement Suboptimality 30
2.1 Introduction 30
2.2 Peko-MC Benchmark Construction 32
2.3 Peko-MS Benchmark Construction 34
2.4 Experiments 39
2.5 Conclusions 51
2.6 Acknowledgments 52
References 52
Part II Flat Placement Techniques 54
3 DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective 55
3.1 Introduction 55
3.2 Preliminaries and the Motivation 57
3.3 Global Placement in DPlace 61
3.4 Legalization and Detailed Placement 69
3.5 Overall Algorithm 69
3.6 Experiments 69
3.7 Conclusions 72
References 73
4 Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model 75
4.1 Introduction 75
4.2 Net Model 78
4.3 Quadratic Placement Methodology 83
4.4 Implementation Details 88
4.5 Experimental Results 97
4.6 Conclusion 106
References 107
Part III Top-Down Partitioning-Based Techniques 110
5 Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability 111
5.1 Introduction 111
5.2 Min-Cut Placement in Capo 113
5.3 Floorplacement 114
5.4 Flexible Whitespace Allocation 118
5.5 Detail Placement 121
5.6 Placement for Routability 124
5.7 Improved RTL Placement 127
5.8 Incremental Placement 132
5.9 Memory Profile 138
5.10 Performance on Publicly Available Benchmarks 139
5.11 Conclusions 145
References 145
6 Congestion Minimization in Modern Placement Circuits 148
6.1 Introduction 148
6.2 Overview of Dragon 149
6.3 Mixed-Size Placement 151
6.4 Congestion Estimation 155
6.5 Congestion Removal 166
6.6 Target Utilization Control 171
6.7 Experimental Result 173
References 175
Part IV Multilevel Placement Techniques 177
7 APlace: A High Quality, Large-Scale Analytical Placer 178
7.1 Introduction 178
7.2 Clustering and Unclustering 180
7.3 Global Placement 182
7.4 Legalization and Detailed Placement 188
7.5 ISPDÌ06 Contest and APlace3.0 192
7.6 Experimental Results 194
References 200
8 FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm 204
8.1 Introduction 204
8.2 Overview of the Algorithm 205
8.3 Quadratic Placement Methodology 207
8.4 Hybrid Net Model 208
8.5 Cell Shifting 212
8.6 Iterative Local Refinement 216
8.7 Clustering for Placement 220
8.8 Legalization 223
8.9 FastDP: Efficient and Effective Detailed Placement 226
8.10 Experimental Results and Analysis 233
8.11 Conclusions 237
References 238
9 mFAR: Multilevel Fixed-Points Addition-Based VLSI Placement 240
9.1 Introduction 240
9.2 Background 241
9.3 Fixed Points 242
9.4 Fixed-Points Addition-Based Placement 246
9.5 mFAR: Multilevel Fixed-Point Addition-Based Placement 251
9.6 Experimental Results 253
9.7 Conclusions 255
References 255
10 mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control 257
10.1 Introduction 257
10.2 Definitions and Notations 258
10.3 Problem Formulation 258
10.4 Multilevel Framework 259
10.5 Generalized Force-Directed Algorithm 265
10.6 Legalization and Detailed Placement 284
10.7 Numerical Results 294
References 295
11 NTUplace3: An Analytical Placer for Large-Scale Mixed- Size Designs 299
11.1 Introduction 299
11.2 Analytical Placement Model 300
11.3 Core Techniques 302
11.4 Experimental Results 313
References 318
12 Conclusion and Challenges 320
Index 322
| Erscheint lt. Verlag | 26.8.2007 |
|---|---|
| Reihe/Serie | Integrated Circuits and Systems |
| Zusatzinfo | XX, 324 p. |
| Verlagsort | New York |
| Sprache | englisch |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Schlagworte | Circuit • Circuits • Cong • Integrated • Interconnect • Kraftwerk • Model • Modern • Nam • Placement • RTL • Standard • VLSI |
| ISBN-10 | 0-387-68739-4 / 0387687394 |
| ISBN-13 | 978-0-387-68739-1 / 9780387687391 |
| Haben Sie eine Frage zum Produkt? |
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