A Fault Tolerant Spaceborne Memory System with Very High Data Integrity Requirements

Compliance to the space radiation environment is a key requirement. Single Event Effect (SEE) and Total Ionization Dose (TID) tests of 1GBit and 2GBit NAND-Flash devices proved their suitability. For highest data integrity countermeasures against Single Event Upsets (SEU) and Single Event Functional Interrupts (SEFI) have to be applied, such as Error Detection and Correction (EDAC) and Cyclic Redundancy Check (CRC) against distributed and clustered SEUs. To cope with Single Event Functional Interrupts (SEFIs) advantage can be taken from the non-volatility of the Flash devices. Nearly all SEFI related malfunctions can be removed without any data loss by operational provisions such as power cycling and access repetition.

The page access of NAND-Flashs supports Orthogonal Reed-Solomon Error Detection and Correction (EDAC) in combination with Orthogonal Interleaving. The interleaving scheme copes with potential error clustering or slice (row) errors diminishing the EDAC efficiency. Details of the correction scheme are studied such as (i) the subdivision of the page into subpages, (ii) either vertical or horizontal correction first and (iii) the gain in correction efficiency by multiple correction cycles.

The error share esh(nh) is the ratio between the non-correctable post-EDAC error count of pages corrupted by one or more errors per page and the pre-EDAC count of pages spoiled by nh errors, each. It is calculated for several example scenarios with and without interleaving such as (a) random distributed errors only, (b) single slice error in combination with random distributed errors and also (c) specific patterns of clustered errors. The error share esh(nh) could be derived by Monte Carlo simulation and for small nh values analytically, also.

For two example radiation environments the pre-EDAC errors rates are assessed and the associated post-EDAC error rates are calculated for two sun orbits, (i) at 1 AU and (ii) at 0.1 AU. Even in the latter more demanding case the post-EDAC Bit Error Rate remains below 1E-9.

By means of the SGDR demonstrator it is shown that NAND-Flash devices offer the opportunity to build spaceborne non-volatile memory systems of high data integrity. Compared to volatile DRAM based designs a reduction in mass can be expected because of the typically four times higher integration density of NAND-Flashs, provided the required data rate does not enforce a substantial parallelization.